Chiplet (INNOLINK™)

Innosilicon provides leading edge chiplet solution with dedicated INNONLINK™ IP. Chiplets refer to the independent constituents which make up a large chip built out of multiple smaller dies.

Innosilicon INNOLINK™ IP is designed to maximize bandwidth between dies, while keeping low power/ small area comparing to other interfaces. It could also be extended to support the high bandwidth communications between chips. INNOLINK™ IP could be integrated in any 40nm or below technology node with an easy-to-use system interface. It is a scalable design to support up to over 1Tbps bandwidth, which could benefit in any high performance computing ASICs/FPGAs, like CPU / GPU / AI accelerator / etc.


(Contact Innosilicon for more details.)


  • Up to over 1Tbps bandwidth
  • Customizable die2die, chip2chip applications to fit flexible designs
  • Customizable controller interface
  • Low power consumption
  • Support different package types