The A10 ASIC (also referred to as A10) is a full customized turn-key ASIC designed to meet customer’s requirement on ultra-high memory bandwidth, high performance, high power efficiency calculation application. It aims to compete with the world's highest-performing graphics cards to perform specific encrypted computing tasks.

The A10 is developed in 14nm LPP (Low Power) process with innovative architecture, low power consumption. A10 is highly integrated solution using very few external components. It is extremely easy to use and easy to deploy in large scale with low cost.

The A10 has operation modes from low power to over clock high performance through adjustment of GDDR6 working clock frequency and/or in combination with voltage adjustment. In the low power mode, the computation clock & operational voltage decreases, thus total power consumption is reduced to around 500W per server (18 sets pre server). In the turbo mode, the performance is pushed to the limit, which reaches to around 485MHs/ server (18 sets pre server) meanwhile the power consumption increases. It is up to the product manufacturers to decide what speed and power efficiency they design the server for and/or whether it is configurable. According to design, A10 is trend to use as fast as possible for GDDR6 speed, within the limitation of GDDR6 stability under high temperature.

CUSTOMER BENEFIT

Chip Production Data

over 300,000pcs

Commercial Time

2019年4月

Performance Indicators

  • Hashrate: 500MH/s (+/-5%)
  • Power Consumption: 860W (+/-10%, at the wall, with
  • 93% efficiency PSU, 25’C temperature)
  • Dimensions: (L)362mm*(W)136mm*(H)285mm
  • Net Weight: 8.1Kg
  • Internet connection: Ethernet
  • Ambient Temperature: 0’C to 80’C

FEATURE (single chip)

  • GPU-like multicore high-performance calculation system (400 CUs)
  • Full customized NIC interconnection bus to achieve over 4Tbps internal internal communication
  • Multiple dynamic scheduler to balance internal core work load
  • Specially designed high efficiency GDDR6 controller to achieve very high memory interface efficiency
  • Safe-guarantee communication interface
  • Build in self-testing and self-healing feature to ensure that it can work in extremely harsh environments